This invention relates to a latch circuit, especially to a latch circuit employing insulated-gate type field-effect transistors and suited to be fabricated in a semiconductor integrated circuit.
Latch circuits are widely used in semiconductor integrated circuits for storing data or keeping circuit conditions. One of known latch circuits is composed of two serially coupled inverter circuits, sampling gate and feed-back gate for operatively coupling an output of the second-stage inverter to an input of the first-stage inverter. In operation, the sampling gate is enabled to apply on input signal into the first-stage inverter circuit during a first period and then, the input signal is latched by enabling the feed-back gate during a second period succeeding to the first period. However this latch circuit requires two control signals for controlling the sampling gate and the feed-back gate. Accordingly, complicated timing signal generator and large area of wiring lines for supplying two control signals to the latch circuit are necessitated. Therefore, it has been difficult to incorporate the latch circuits into the high-density semiconductor integrated circuit with large scale integration.